| AFE_base(bool spi_addr, bool highspeed_variant, int nINT, int DRDY, int SYN, int nRESET, int DRDY_input, int SYNCDAC) | AFE_base | |
| AIN enum value | NAFE33352_Base | |
| AIP enum value | NAFE33352_Base | |
| AIP_AIN enum value | NAFE33352_Base | |
| AIP_VSNS enum value | NAFE33352_Base | |
| begin(void) | AFE_base | virtual |
| BG enum value | NAFE33352_Base | |
| bit_count(uint32_t value) | AFE_base | protected |
| bit_op(T rg, uint32_t mask, uint32_t value) | NAFE33352_Base | inline |
| boot(void) | NAFE33352_Base | virtual |
| burst(uint32_t *data, int length, int width=3) | SPI_for_AFE | |
| calc_delay(int ch) | NAFE33352_Base | private |
| callback_fp_t typedef | AFE_base | |
| cbf_DRDY | AFE_base | protectedstatic |
| ch_delay | AFE_base | protected |
| ch_setting_t typedef | NAFE33352_Base | |
| channel_info_update(uint16_t value) | NAFE33352_Base | private |
| close_logical_channel(int ch) | NAFE33352_Base | virtual |
| close_logical_channel(void) | NAFE33352_Base | virtual |
| CMD_ADC_ABORT enum value | NAFE33352_Base | |
| CMD_AO_ABORT enum value | NAFE33352_Base | |
| CMD_AO_ABORT_HIZ enum value | NAFE33352_Base | |
| CMD_BURST_DATA enum value | NAFE33352_Base | |
| CMD_CALC_CRC_COEF enum value | NAFE33352_Base | |
| CMD_CALC_CRC_CONFIG enum value | NAFE33352_Base | |
| CMD_CALC_CRC_FAC enum value | NAFE33352_Base | |
| CMD_CH0 enum value | NAFE33352_Base | |
| CMD_CH1 enum value | NAFE33352_Base | |
| CMD_CH2 enum value | NAFE33352_Base | |
| CMD_CH3 enum value | NAFE33352_Base | |
| CMD_CH4 enum value | NAFE33352_Base | |
| CMD_CH5 enum value | NAFE33352_Base | |
| CMD_CH6 enum value | NAFE33352_Base | |
| CMD_CH7 enum value | NAFE33352_Base | |
| CMD_CISW_ABORT enum value | NAFE33352_Base | |
| CMD_CISW_ABORT_HIZ enum value | NAFE33352_Base | |
| CMD_CLEAR_ALARM enum value | NAFE33352_Base | |
| CMD_CLEAR_DAC0 enum value | NAFE33352_Base | |
| CMD_CLEAR_DATA enum value | NAFE33352_Base | |
| CMD_CLEAR_REG enum value | NAFE33352_Base | |
| CMD_END enum value | NAFE33352_Base | |
| CMD_MC enum value | NAFE33352_Base | |
| CMD_MM enum value | NAFE33352_Base | |
| CMD_MS enum value | NAFE33352_Base | |
| CMD_RELOAD enum value | NAFE33352_Base | |
| CMD_RESET enum value | NAFE33352_Base | |
| CMD_SC enum value | NAFE33352_Base | |
| CMD_SS enum value | NAFE33352_Base | |
| CMD_WGEN_START enum value | NAFE33352_Base | |
| CMD_WGEN_STOP enum value | NAFE33352_Base | |
| coeff_V | AFE_base | protected |
| Command enum name | NAFE33352_Base | |
| command(uint16_t com) | NAFE33352_Base | virtual |
| command_length | SPI_for_AFE | privatestatic |
| dac | NAFE33352_Base | |
| dac_code(double a, double full_scale, uint8_t bit_length) | NAFE33352_Base | |
| dac_out(double vi, double full_scale, uint8_t bit_length) | NAFE33352_Base | virtual |
| DAC_REF enum value | NAFE33352_Base | |
| default_drdy_cb() | AFE_base | protected |
| delay_accuracy | AFE_base | protectedstatic |
| dev_add | AFE_base | protected |
| DRDY_by_sequencer_done(bool flag=true) | NAFE33352_Base | virtual |
| DRDY_cb() | AFE_base | protectedstatic |
| drdy_count | AFE_base | protected |
| drdy_delay(int ch) | AFE_base | inline |
| drdy_delay(void) | AFE_base | inline |
| drdy_flag | AFE_base | protected |
| enable_logical_channel(int ch) | NAFE33352_Base | virtual |
| enabled_channels | AFE_base | protected |
| enabled_logical_channels(void) | AFE_base | inline |
| G_PGA_x16_0 enum value | NAFE33352_Base | |
| G_PGA_x_1_0 enum value | NAFE33352_Base | |
| GainPGA enum name | NAFE33352_Base | |
| get_data16(uint8_t *vp) | SPI_for_AFE | inlineprivate |
| get_data24(uint8_t *vp) | SPI_for_AFE | inlineprivate |
| GPIO0_GPIO1 enum value | NAFE33352_Base | |
| GPIO0_VCM enum value | NAFE33352_Base | |
| highspeed_variant | AFE_base | protected |
| HV_MUX enum value | AFE_base | |
| IN_SEL enum name | NAFE33352_Base | |
| init(void) | AFE_base | protectedvirtual |
| instance | AFE_base | static |
| ISNS enum value | NAFE33352_Base | |
| LDO enum value | NAFE33352_Base | |
| logical_channel | NAFE33352_Base | |
| LV_mux_sel enum name | AFE_base | |
| mux_setting | AFE_base | protected |
| NAFE33352_Base(bool spi_addr, bool highspeed_variant, int nINT, int DRDY, int SYN, int nRESET, int DRDY_input, int SYNCDAC) | NAFE33352_Base | |
| NAFE33352_UIOM(bool spi_addr=0, bool highspeed_variant=false, int nINT=7, int DRDY=4, int SYN=14, int nRESET=14, int DRDY_input=2, int SYNCDAC=14) | NAFE33352_UIOM | |
| on_board_shunt_resister | NAFE33352_Base | static |
| open_dac_output(const uint16_t(&cc)[6]) | NAFE33352_Base | |
| open_logical_channel(int ch, uint16_t cc0, uint16_t cc1, uint16_t cc2, uint16_t dummy) | NAFE33352_Base | virtual |
| open_logical_channel(int ch, const uint16_t(&cc)[4]) | NAFE33352_Base | virtual |
| part_number(void) | NAFE33352_Base | |
| pga_gain | NAFE33352_Base | static |
| pin_DRDY | AFE_base | protected |
| pin_DRDY_input | AFE_base | protected |
| pin_nINT | AFE_base | protected |
| pin_nRESET | AFE_base | protected |
| pin_SYN | AFE_base | protected |
| pin_SYNCDAC | AFE_base | protected |
| raw2mv(int ch, raw_t value) | AFE_base | inline |
| raw2uv(int ch, raw_t value) | AFE_base | inline |
| raw2v(int ch, raw_t value) | NAFE33352_Base | inlinevirtual |
| raw_t typedef | AFE_base | |
| read(int ch) | NAFE33352_Base | virtual |
| read(raw_t *data) | NAFE33352_Base | virtual |
| read(volt_t *data) | NAFE33352_Base | virtual |
| read_r16(uint16_t reg) | SPI_for_AFE | |
| read_r24(uint16_t reg) | SPI_for_AFE | |
| REF2_REF2 enum value | AFE_base | |
| REF2_VHSS enum value | AFE_base | |
| REF_BYP__VCM enum value | NAFE33352_Base | |
| REFCOARSE_REF2 enum value | AFE_base | |
| reg(Register16 r, uint16_t value) | NAFE33352_Base | virtual |
| reg(Register24 r, uint32_t value) | NAFE33352_Base | virtual |
| reg(Register16 r) | NAFE33352_Base | virtual |
| reg(Register24 r) | NAFE33352_Base | virtual |
| Register16 enum name | NAFE33352_Base | |
| Register24 enum name | NAFE33352_Base | |
| reset(bool hardware_reset=false) | NAFE33352_Base | virtual |
| revision_number(void) | NAFE33352_Base | |
| sequence_order | AFE_base | protected |
| serial_number(void) | NAFE33352_Base | |
| set_DRDY_callback(callback_fp_t fnc) | AFE_base | virtual |
| start(int ch) | NAFE33352_Base | virtual |
| start(void) | NAFE33352_Base | virtual |
| start_and_read(int ch) | AFE_base | virtual |
| start_and_read(T data) | AFE_base | inline |
| start_continuous_conversion() | NAFE33352_Base | virtual |
| static_default_drdy_cb() | AFE_base | protectedstatic |
| temperature(void) | NAFE33352_Base | |
| TIA enum value | NAFE33352_Base | |
| timeout_limit | AFE_base | protectedstatic |
| total_delay | AFE_base | protected |
| txrx(uint8_t *data, int size) | SPI_for_AFE | |
| use_DRDY_trigger(bool use=true) | AFE_base | |
| VADD enum value | NAFE33352_Base | |
| VADD_REF2 enum value | AFE_base | |
| VCM__REF_BYP enum value | NAFE33352_Base | |
| VCM_GPIO1 enum value | NAFE33352_Base | |
| VCM_VCM enum value | NAFE33352_Base | |
| VHDD enum value | NAFE33352_Base | |
| VHDD_REF2 enum value | AFE_base | |
| VHSS enum value | NAFE33352_Base | |
| volt_t typedef | AFE_base | |
| VSNS enum value | NAFE33352_Base | |
| wait_conversion_complete(double delay=-1.0) | AFE_base | protected |
| write_r16(uint16_t reg) | SPI_for_AFE | |
| write_r16(uint16_t reg, uint16_t val) | SPI_for_AFE | |
| write_r24(uint16_t reg, uint32_t val) | SPI_for_AFE | |
| ~AFE_base() | AFE_base | virtual |
| ~NAFE33352_Base() | NAFE33352_Base | virtual |
| ~NAFE33352_UIOM() | NAFE33352_UIOM | virtual |
1.16.1