NAFE33352_Base Class Reference

#include <NAFE33352.h>

Inheritance diagram for NAFE33352_Base:

Classes
class	DAC
class	LogicalChannel

Public Types
enum	IN_SEL : uint8_t {   VCM_VCM = 0 , AIP_AIN , AIP_VSNS , GPIO0_GPIO1 ,   AIP , AIN , ISNS , VSNS ,   TIA , GPIO0_VCM , VCM_GPIO1 , REF_BYP__VCM ,   VCM__REF_BYP , BG , VADD , LDO ,   VHDD , VHSS , DAC_REF }
enum	GainPGA : uint8_t { G_PGA_x_1_0 , G_PGA_x16_0 }
enum class	Register16 : uint16_t {   CRC_CONF_REGS = 0x20 , CRC_COEF_REGS = 0x21 , CRC_TRIM_REGS = 0x22 , CRC_TRIM_REF = 0x3F ,   GPI_DATA = 0x23 , GPO_ENABLE = 0x24 , GPIO_FUNCTION = 0x25 , GPI_ENABLE = 0x26 ,   GPI_EDGE_POS = 0x27 , GPI_EDGE_NEG = 0x28 , GPO_DATA = 0x29 , SYS_CONFIG = 0x2A ,   SYS_STATUS = 0x2B , CK_SRC_SEL_CONFIG = 0x30 , GLOBAL_ALARM_ENABLE = 0x2C , GLOBAL_ALARM_INT = 0x2D ,   DIE_TEMP = 0x2E , TEMP_THRS = 0x2F , PN2 = 0x40 , PN1 = 0x41 ,   PN0_REV = 0x42 , AI_CONFIG0 = 0x1000 | 0x20 , AI_CONFIG1 = 0x1000 | 0x21 , AI_CONFIG2 = 0x1000 | 0x22 ,   AI_MULTI_CH_EN = 0x1000 | 0x23 , AI_SYSCFG = 0x1000 | 0x24 , AI_STATUS = 0x1000 | 0x25 , AI_STATUS_OVR = 0x1000 | 0x26 ,   AI_STATUS_UDR = 0x1000 | 0x27 , AIO_CONFIG = 0x1C00 | 0x20 , AO_CAL_COEF = 0x1C00 | 0x21 , AIO_PROT_CFG = 0x1C00 | 0x22 ,   AO_SLR_CTRL = 0x1C00 | 0x23 , AWG_PER = 0x1C00 | 0x24 , AO_SYSCFG = 0x1C00 | 0x25 , AIO_STATUS = 0x1C00 | 0x26 }
enum class	Register24 : uint16_t {   GAIN_COEF0 = 0x50 , GAIN_COEF1 , GAIN_COEF2 , GAIN_COEF3 ,   GAIN_COEF4 , GAIN_COEF5 , GAIN_COEF6 , GAIN_COEF7 ,   OFFSET_COEF0 = 0x58 , OFFSET_COEF1 , OFFSET_COEF2 , OFFSET_COEF3 ,   OFFSET_COEF4 , OFFSET_COEF5 , OFFSET_COEF6 , OFFSET_COEF7 ,   EXTRA_CAL_COEF0 = 0x60 , EXTRA_CAL_COEF1 , EXTRA_CAL_COEF2 , EXTRA_CAL_COEF3 ,   EXTRA_CAL_COEF4 , EXTRA_CAL_COEF5 , EXTRA_CAL_COEF6 , EXTRA_CAL_COEF7 ,   SERIAL1 = 0x43 , SERIAL0 , AI_DATA0 = 0x1000 | 0x30 , AI_DATA1 ,   AI_DATA2 , AI_DATA3 , AI_DATA4 , AI_DATA5 ,   AI_DATA6 , AI_DATA7 , AI_CH_OVR_THR_0 = 0x1000 | 0x38 , AI_CH_OVR_THR_1 ,   AI_CH_OVR_THR_2 , AI_CH_OVR_THR_3 , AI_CH_OVR_THR_4 , AI_CH_OVR_THR_5 ,   AI_CH_OVR_THR_6 , AI_CH_OVR_THR_7 , AI_CH_UDR_THR_0 = 0x1000 | 0x40 , AI_CH_UDR_THR_1 ,   AI_CH_UDR_THR_2 , AI_CH_UDR_THR_3 , AI_CH_UDR_THR_4 , AI_CH_UDR_THR_5 ,   AI_CH_UDR_THR_6 , AI_CH_UDR_THR_7 , AO_DATA = 0x1C00 | 0x28 , AO_OC_POS_LIMIT ,   AO_OC_NEG_LIMIT , AWG_AMP_MAX , AWG_AMP_MIN }
enum	Command : uint16_t {   CMD_CLEAR_ALARM = 0x12 , CMD_RESET = 0x14 , CMD_CLEAR_REG = 0x15 , CMD_RELOAD = 0x16 ,   CMD_CALC_CRC_CONFIG = 0x2006 , CMD_CALC_CRC_COEF = 0x2007 , CMD_CALC_CRC_FAC = 0x2008 , CMD_CH0 = 0x1000 ,   CMD_CH1 = 0x1001 , CMD_CH2 = 0x1002 , CMD_CH3 = 0x1003 , CMD_CH4 = 0x1004 ,   CMD_CH5 = 0x1005 , CMD_CH6 = 0x1006 , CMD_CH7 = 0x1007 , CMD_ADC_ABORT = 0x1010 ,   CMD_END = 0x1012 , CMD_CLEAR_DATA = 0x1013 , CMD_SS = 0x3000 , CMD_SC = 0x3001 ,   CMD_MM = 0x3002 , CMD_MC = 0x3003 , CMD_MS = 0x3004 , CMD_BURST_DATA = 0x3005 ,   CMD_WGEN_STOP = 0x1C00 , CMD_WGEN_START = 0x1C01 , CMD_CLEAR_DAC0 = 0x1C02 , CMD_AO_ABORT = 0x1C03 ,   CMD_AO_ABORT_HIZ = 0x1C04 , CMD_CISW_ABORT = 0x1C05 , CMD_CISW_ABORT_HIZ = 0x1C06 }
using	ch_setting_t = uint16_t[4]
Public Types inherited from AFE_base
enum	LV_mux_sel : uint8_t {   REF2_REF2 = 0 , GPIO0_GPIO1 , REFCOARSE_REF2 , VADD_REF2 ,   VHDD_REF2 , REF2_VHSS , HV_MUX }
using	raw_t = int32_t
using	volt_t = double
typedef void(*	callback_fp_t) (void)

Public Member Functions
	NAFE33352_Base (bool spi_addr, bool highspeed_variant, int nINT, int DRDY, int SYN, int nRESET, int DRDY_input, int SYNCDAC)
virtual	~NAFE33352_Base ()
virtual void	boot (void)
virtual void	reset (bool hardware_reset=false)
virtual void	open_logical_channel (int ch, uint16_t cc0, uint16_t cc1, uint16_t cc2, uint16_t dummy)
virtual void	open_logical_channel (int ch, const uint16_t(&cc)[4])
void	open_dac_output (const uint16_t(&cc)[6])
virtual void	close_logical_channel (int ch)
virtual void	close_logical_channel (void)
void	enable_logical_channel (int ch)
virtual void	start (int ch)
virtual void	start (void)
virtual void	start_continuous_conversion ()
virtual void	DRDY_by_sequencer_done (bool flag=true)
virtual raw_t	read (int ch)
virtual void	read (raw_t *data)
virtual void	read (volt_t *data)
double	raw2v (int ch, raw_t value)
virtual void	dac_out (double vi, double full_scale, uint8_t bit_length)
int32_t	dac_code (double a, double full_scale, uint8_t bit_length)
virtual void	command (uint16_t com)
virtual void	reg (Register16 r, uint16_t value)
virtual void	reg (Register24 r, uint32_t value)
virtual uint16_t	reg (Register16 r)
virtual uint32_t	reg (Register24 r)
template<typename T >
uint32_t	bit_op (T rg, uint32_t mask, uint32_t value)
uint64_t	part_number (void)
uint8_t	revision_number (void)
uint64_t	serial_number (void)
float	temperature (void)
Public Member Functions inherited from AFE_base
	AFE_base (bool spi_addr, bool highspeed_variant, int nINT, int DRDY, int SYN, int nRESET, int DRDY_input, int SYNCDAC)
virtual	~AFE_base ()
virtual void	begin (void)
virtual void	set_DRDY_callback (callback_fp_t fnc)
virtual raw_t	start_and_read (int ch)
template<typename T >
void	start_and_read (T data)
double	raw2uv (int ch, raw_t value)
double	raw2mv (int ch, raw_t value)
double	drdy_delay (int ch)
double	drdy_delay (void)
int	enabled_logical_channels (void)
void	use_DRDY_trigger (bool use=true)
Public Member Functions inherited from SPI_for_AFE
void	txrx (uint8_t *data, int size)
void	write_r16 (uint16_t reg)
void	write_r16 (uint16_t reg, uint16_t val)
uint16_t	read_r16 (uint16_t reg)
void	write_r24 (uint16_t reg, uint32_t val)
int32_t	read_r24 (uint16_t reg)
void	burst (uint32_t *data, int length, int width=3)

Public Attributes
LogicalChannel	logical_channel [16]
DAC	dac

Static Public Attributes
static constexpr double	on_board_shunt_resister = 50.00
static constexpr double	pga_gain [] = { 1.00, 16.00 }
Static Public Attributes inherited from AFE_base
static AFE_base *	instance = nullptr

Private Member Functions
double	calc_delay (int ch)
void	channel_info_update (uint16_t value)

Additional Inherited Members
Protected Member Functions inherited from AFE_base
int	bit_count (uint32_t value)
void	default_drdy_cb ()
virtual void	init (void)
int	wait_conversion_complete (double delay=-1.0)
Protected Member Functions inherited from SPI_for_AFE
void	init (void)
Static Protected Member Functions inherited from AFE_base
static void	static_default_drdy_cb ()
static void	DRDY_cb ()
Protected Attributes inherited from AFE_base
bool	dev_add
bool	highspeed_variant
int	pin_nINT
int	pin_DRDY
int	pin_SYN
int	pin_nRESET
int	pin_DRDY_input
int	pin_SYNCDAC
int	enabled_channels
uint8_t	sequence_order [16]
double	coeff_V [16]
int	mux_setting [16]
double	ch_delay [16]
double	total_delay
uint32_t	drdy_count
volatile bool	drdy_flag
Static Protected Attributes inherited from AFE_base
static double	delay_accuracy = 1.1
static constexpr uint32_t	timeout_limit = 10000000
static callback_fp_t	cbf_DRDY = nullptr

Detailed Description

NXP Analog Front End class library for MCX

Author

Tedd OKANO

Copyright: 2026 Tedd OKANO Released under the MIT license

Definition at line 16 of file NAFE33352.h.

Member Typedef Documentation

ch_setting_t

using NAFE33352_Base::ch_setting_t = uint16_t[ 4 ]

Definition at line 19 of file NAFE33352.h.

Member Enumeration Documentation

Command

enum NAFE33352_Base::Command : uint16_t

Enumerator
CMD_CLEAR_ALARM
CMD_RESET
CMD_CLEAR_REG
CMD_RELOAD
CMD_CALC_CRC_CONFIG
CMD_CALC_CRC_COEF
CMD_CALC_CRC_FAC
CMD_CH0
CMD_CH1
CMD_CH2
CMD_CH3
CMD_CH4
CMD_CH5
CMD_CH6
CMD_CH7
CMD_ADC_ABORT
CMD_END
CMD_CLEAR_DATA
CMD_SS
CMD_SC
CMD_MM
CMD_MC
CMD_MS
CMD_BURST_DATA
CMD_WGEN_STOP
CMD_WGEN_START
CMD_CLEAR_DAC0
CMD_AO_ABORT
CMD_AO_ABORT_HIZ
CMD_CISW_ABORT
CMD_CISW_ABORT_HIZ

Definition at line 355 of file NAFE33352.h.

GainPGA

enum NAFE33352_Base::GainPGA : uint8_t

Enumerator
G_PGA_x_1_0
G_PGA_x16_0

Definition at line 249 of file NAFE33352.h.

IN_SEL

enum NAFE33352_Base::IN_SEL : uint8_t

Enumerator
VCM_VCM
AIP_AIN
AIP_VSNS
GPIO0_GPIO1
AIP
AIN
ISNS
VSNS
TIA
GPIO0_VCM
VCM_GPIO1
REF_BYP__VCM
VCM__REF_BYP
BG
VADD
LDO
VHDD
VHSS
DAC_REF

Definition at line 227 of file NAFE33352.h.

Register16

enum class NAFE33352_Base::Register16 : uint16_t

strong

Enumerator
CRC_CONF_REGS
CRC_COEF_REGS
CRC_TRIM_REGS
CRC_TRIM_REF
GPI_DATA
GPO_ENABLE
GPIO_FUNCTION
GPI_ENABLE
GPI_EDGE_POS
GPI_EDGE_NEG
GPO_DATA
SYS_CONFIG
SYS_STATUS
CK_SRC_SEL_CONFIG
GLOBAL_ALARM_ENABLE
GLOBAL_ALARM_INT
DIE_TEMP
TEMP_THRS
PN2
PN1
PN0_REV
AI_CONFIG0
AI_CONFIG1
AI_CONFIG2
AI_MULTI_CH_EN
AI_SYSCFG
AI_STATUS
AI_STATUS_OVR
AI_STATUS_UDR
AIO_CONFIG
AO_CAL_COEF
AIO_PROT_CFG
AO_SLR_CTRL
AWG_PER
AO_SYSCFG
AIO_STATUS

Definition at line 254 of file NAFE33352.h.

Register24

enum class NAFE33352_Base::Register24 : uint16_t

strong

Enumerator
GAIN_COEF0
GAIN_COEF1
GAIN_COEF2
GAIN_COEF3
GAIN_COEF4
GAIN_COEF5
GAIN_COEF6
GAIN_COEF7
OFFSET_COEF0
OFFSET_COEF1
OFFSET_COEF2
OFFSET_COEF3
OFFSET_COEF4
OFFSET_COEF5
OFFSET_COEF6
OFFSET_COEF7
EXTRA_CAL_COEF0
EXTRA_CAL_COEF1
EXTRA_CAL_COEF2
EXTRA_CAL_COEF3
EXTRA_CAL_COEF4
EXTRA_CAL_COEF5
EXTRA_CAL_COEF6
EXTRA_CAL_COEF7
SERIAL1
SERIAL0
AI_DATA0
AI_DATA1
AI_DATA2
AI_DATA3
AI_DATA4
AI_DATA5
AI_DATA6
AI_DATA7
AI_CH_OVR_THR_0
AI_CH_OVR_THR_1
AI_CH_OVR_THR_2
AI_CH_OVR_THR_3
AI_CH_OVR_THR_4
AI_CH_OVR_THR_5
AI_CH_OVR_THR_6
AI_CH_OVR_THR_7
AI_CH_UDR_THR_0
AI_CH_UDR_THR_1
AI_CH_UDR_THR_2
AI_CH_UDR_THR_3
AI_CH_UDR_THR_4
AI_CH_UDR_THR_5
AI_CH_UDR_THR_6
AI_CH_UDR_THR_7
AO_DATA
AO_OC_POS_LIMIT
AO_OC_NEG_LIMIT
AWG_AMP_MAX
AWG_AMP_MIN

Definition at line 295 of file NAFE33352.h.

Constructor & Destructor Documentation

NAFE33352_Base()

NAFE33352_Base::NAFE33352_Base	(	bool	spi_addr,
		bool	highspeed_variant,
		int	nINT,
		int	DRDY,
		int	SYN,
		int	nRESET,
		int	DRDY_input,
		int	SYNCDAC
	)

Constructor to create a NAFE33352_Base instance

Definition at line 115 of file NAFE33352.cpp.

~NAFE33352_Base()

NAFE33352_Base::~NAFE33352_Base ( )

virtual

Destractor

Definition at line 127 of file NAFE33352.cpp.

Member Function Documentation

bit_op()

template<typename T >

uint32_t NAFE33352_Base::bit_op ( T  rg, uint32_t  mask, uint32_t  value  )

inline

Register bit operation

overwrite bits i a register

Parameters

reg	register specified by Register16 or Register24 member
mask	mask bits
reg	value to over write

Definition at line 435 of file NAFE33352.h.

Referenced by close_logical_channel(), DRDY_by_sequencer_done(), and enable_logical_channel().

boot()

void NAFE33352_Base::boot ( void  )

virtual

Set system-level config registers

Implements AFE_base.

Definition at line 131 of file NAFE33352.cpp.

calc_delay()

double NAFE33352_Base::calc_delay ( int  ch )

private

Definition at line 285 of file NAFE33352.cpp.

Referenced by open_logical_channel().

channel_info_update()

void NAFE33352_Base::channel_info_update ( uint16_t  value )

private

Definition at line 260 of file NAFE33352.cpp.

Referenced by close_logical_channel(), close_logical_channel(), and enable_logical_channel().

close_logical_channel() [1/2]

void NAFE33352_Base::close_logical_channel ( int  ch )

virtual

Logical channel disable

Parameters

ch	logical channel number (0 ~ 15)

Implements AFE_base.

Definition at line 357 of file NAFE33352.cpp.

close_logical_channel() [2/2]

void NAFE33352_Base::close_logical_channel ( void  )

virtual

All logical channel disable

Implements AFE_base.

Definition at line 365 of file NAFE33352.cpp.

command()

void NAFE33352_Base::command ( uint16_t  com )

virtual

Command

Parameters

com	"Comand" type or uint16_t value

Definition at line 429 of file NAFE33352.cpp.

Referenced by boot(), calc_delay(), open_logical_channel(), reset(), start(), start(), and start_continuous_conversion().

dac_code()

int32_t NAFE33352_Base::dac_code	(	double	a,
		double	full_scale,
		uint8_t	bit_length
	)

Definition at line 417 of file NAFE33352.cpp.

Referenced by dac_out().

dac_out()

void NAFE33352_Base::dac_out ( double  vi, double  full_scale, uint8_t  bit_length  )

virtual

Definition at line 412 of file NAFE33352.cpp.

DRDY_by_sequencer_done()

void NAFE33352_Base::DRDY_by_sequencer_done ( bool  flag = true )

virtual

DRDY event select

Parameters

set	true for DRDY by sequencer is done

Implements AFE_base.

Definition at line 387 of file NAFE33352.cpp.

Referenced by boot().

enable_logical_channel()

void NAFE33352_Base::enable_logical_channel ( int  ch )

virtual

Logical channel enable

Parameters

ch	logical channel number (0 ~ 15)

Implements AFE_base.

Definition at line 349 of file NAFE33352.cpp.

Referenced by open_logical_channel().

open_dac_output()

void NAFE33352_Base::open_dac_output

(

const uint16_t(&)

cc[6]

)

Definition at line 171 of file NAFE33352.cpp.

open_logical_channel() [1/2]

void NAFE33352_Base::open_logical_channel ( int  ch, const uint16_t(&)  cc[4]  )

virtual

Configure logical channel

Parameters

ch	logical channel number (0 ~ 15)
cc	array for AI_CONFIG0, AI_CONFIG1, AI_CONFIG2 and dummy values

Implements AFE_base.

Definition at line 178 of file NAFE33352.cpp.

open_logical_channel() [2/2]

void NAFE33352_Base::open_logical_channel ( int  ch, uint16_t  cc0, uint16_t  cc1, uint16_t  cc2, uint16_t  dummy  )

virtual

Configure logical channel

Parameters

ch	logical channel number (0 ~ 15)
cc0	16bit value to be set AI_CONFIG0 register (0x20)
cc1	16bit value to be set AI_CONFIG1 register (0x21)
cc2	16bit value to be set AI_CONFIG2 register (0x22)
dummy	dummy variable to keep compatibility over AFE devices

Implements AFE_base.

Definition at line 342 of file NAFE33352.cpp.

Referenced by open_logical_channel().

part_number()

uint64_t NAFE33352_Base::part_number

(

void

)

Read part_number

Returns

0x13388B40

Definition at line 454 of file NAFE33352.cpp.

raw2v()

double NAFE33352_Base::raw2v ( int  ch, raw_t  value  )

inlinevirtual

Convert raw output to volt

Parameters

ch	logical channel number to select its gain coefficient
value	ADC read value

Implements AFE_base.

Definition at line 212 of file NAFE33352.h.

read() [1/3]

int32_t NAFE33352_Base::read ( int  ch )

virtual

Read ADC for single channel

Parameters

ch	logical channel number (0 ~ 15)

Implements AFE_base.

Definition at line 392 of file NAFE33352.cpp.

Referenced by bit_op(), boot(), calc_delay(), channel_info_update(), close_logical_channel(), command(), NAFE33352_Base::LogicalChannel::configure(), NAFE33352_Base::DAC::configure(), NAFE33352_Base::DAC::configure(), NAFE33352_Base::DAC::configure(), NAFE33352_Base::DAC::configure(), NAFE33352_Base::LogicalChannel::configure(), dac_code(), dac_out(), DRDY_by_sequencer_done(), enable_logical_channel(), NAFE33352_Base(), open_dac_output(), open_logical_channel(), open_logical_channel(), NAFE33352_Base::DAC::operator=(), NAFE33352_Base::DAC::output(), part_number(), raw2v(), read(), read(), read(), reg(), reg(), reg(), reg(), reset(), serial_number(), start(), and temperature().

read() [2/3]

void NAFE33352_Base::read ( raw_t *  data )

virtual

Read ADC for all channel

Parameters

data_ptr

pointer to array to store ADC data

Implements AFE_base.

Definition at line 397 of file NAFE33352.cpp.

read() [3/3]

void NAFE33352_Base::read ( volt_t *  data )

virtual

Read ADC for all channel

Parameters

data_ptr

pointer to array to store ADC data

Implements AFE_base.

Definition at line 402 of file NAFE33352.cpp.

reg() [1/4]

uint16_t NAFE33352_Base::reg ( Register16  r )

virtual

Read register

Reads register. Register width is selected by reg type (Register16 ot Register24)

Parameters

reg	register specified by Register16 member

Returns

readout value

Definition at line 444 of file NAFE33352.cpp.

reg() [2/4]

void NAFE33352_Base::reg ( Register16  r, uint16_t  value  )

virtual

Write register

Writes register. Register width is selected by reg type (Register16 ot Register24)

Parameters

reg	register specified by Register16 member

Definition at line 434 of file NAFE33352.cpp.

Referenced by bit_op(), boot(), calc_delay(), close_logical_channel(), dac_out(), open_dac_output(), open_logical_channel(), part_number(), read(), reset(), revision_number(), serial_number(), and temperature().

reg() [3/4]

uint32_t NAFE33352_Base::reg ( Register24  r )

virtual

Read register

Reads register. Register width is selected by reg type (Register16 ot Register24)

Parameters

reg	register specified by Register24 member

Returns

readout value

Definition at line 449 of file NAFE33352.cpp.

reg() [4/4]

void NAFE33352_Base::reg ( Register24  r, uint32_t  value  )

virtual

Write register

Writes register. Register width is selected by reg type (Register16 ot Register24)

Parameters

reg	register specified by Register24 member

Definition at line 439 of file NAFE33352.cpp.

reset()

void NAFE33352_Base::reset ( bool  hardware_reset = false )

virtual

Issue RESET command

Implements AFE_base.

Definition at line 147 of file NAFE33352.cpp.

revision_number()

uint8_t NAFE33352_Base::revision_number

(

void

)

Read rivision number

Returns

PN0 register value & 0xF

Definition at line 459 of file NAFE33352.cpp.

serial_number()

uint64_t NAFE33352_Base::serial_number

(

void

)

Read serial number

Returns

serial number

Definition at line 464 of file NAFE33352.cpp.

Referenced by serial_number().

start() [1/2]

void NAFE33352_Base::start ( int  ch )

virtual

Start ADC

Parameters

ch	logical channel number (0 ~ 15)

Implements AFE_base.

Definition at line 371 of file NAFE33352.cpp.

start() [2/2]

void NAFE33352_Base::start ( void  )

virtual

Start ADC on all logical channel

Implements AFE_base.

Definition at line 377 of file NAFE33352.cpp.

start_continuous_conversion()

void NAFE33352_Base::start_continuous_conversion ( void  )

virtual

Start continuous AD conversion

Implements AFE_base.

Definition at line 382 of file NAFE33352.cpp.

temperature()

float NAFE33352_Base::temperature

(

void

)

Die temperature

Returns

die temperature in celsius

Definition at line 473 of file NAFE33352.cpp.

Member Data Documentation

dac

DAC NAFE33352_Base::dac

Definition at line 143 of file NAFE33352.h.

Referenced by NAFE33352_Base().

logical_channel

LogicalChannel NAFE33352_Base::logical_channel[16]

16 LogicalChannel instance array

Definition at line 74 of file NAFE33352.h.

Referenced by NAFE33352_Base().

on_board_shunt_resister

constexpr double NAFE33352_Base::on_board_shunt_resister = 50.00

staticconstexpr

Definition at line 20 of file NAFE33352.h.

Referenced by raw2v().

pga_gain

constexpr double NAFE33352_Base::pga_gain[] = { 1.00, 16.00 }

staticconstexpr

Definition at line 225 of file NAFE33352.h.

---

The documentation for this class was generated from the following files:

• NAFE33352.h
• NAFE33352.cpp